The present invention relates to an integrated circuit internal signal monitoring apparatus, in particular, an apparatus characterized by a read operation of a plurality of internal states without increasing the number of input/output pins provided in a large scale integrated circuit (hereinafter, referred to as an LSI) system.
Conventionally, an integrated circuit internal signal monitoring apparatus as described in Japanese Patent No. 2580558 is known.
A conventional integrated circuit internal signal monitoring apparatus will be described with reference to FIG. 3. In order to monitor from outside an internal operation of a circuit block 12 provided in an LSI 11, a selector 19 is provided. The circuit block 12 has its original function. The selector 19 receives signals 21 to be monitored among signals inside the circuit block 12 as inputs, and also receives a selection signal 31 from outside the LSI 11 through an input pin, thus to designate the specific signal to be monitored. Based on the value of the selection signal 31, the selector 19 selects a plurality of signals 32 from the input signals 21 and outputs the signals 32 to outside the LSI 11 through an output pin, so that the signals can be monitored.
However, the conventional structure described above has the following problem. When signals driven inside the LSI 11 are monitored outside through the LSI output pins, a large number of output pins for monitoring and the selection signal input pins are required, as the number of the signals to be simultaneously monitored increases. Therefore, the number of pins in the entire LSI 11 increases.
Furthermore, when monitoring the LSI internal signals from outside the LSI 11 with a logic analyzer or the like, a signal analysis performed with the internal states of the LSI as event conditions requires even the internal signals relating to the event conditions to be output externally. This causes a problem of a further increase in the number of the input/output pins.
An integrated circuit internal signal monitoring apparatus according to the present invention includes: an integrated circuit, including: signal change information generating means for detecting changes in a plurality of internal signals to be monitored in a circuit block, and for, when a level of at least one of the plurality of internal signals is changed, sequentially generating flags indicating the internal signal whose level has been changed, the post-change level, and that the levels of other internal signals have not been changed, storage means for sequentially storing the flags generated by the signal change information generating means, and trigger generating means for generating a write stop trigger signal for stopping a write operation of the flags to the storage means; and internal signal waveform reproduction means for reading the flags from the storage means after the generation of the write stop trigger signal, and reproducing waveforms of the plurality of internal signals. Thus, the above-described problems are solved.
The storage means includes a ring buffer, and the flags may be sequentially stored in the ring buffer in a time series.
The trigger generating means may generate the write stop trigger signal when a value of one of the plurality of internal signals and an expected value of a signal input from outside the integrated circuit match each other.
According to one aspect of the present invention, LSI internal signals around a required point can be monitored with a significantly smaller number of input/output pins compared to the prior art, and debug can easily be performed based on a signal state around a generation time of external events and internal events.
According to another aspect of the present invention, only a signal change point value is stored to a storage device, and information of the storage device is read from outside to form waveforms as necessary. Thus, the number of LSI input/output pins can be reduced, and, in a system incorporating an LSI, the system can easily be debugged by monitoring an internal signal state with the time to monitor being specified.
According to still another aspect of the present invention, the capacity of storage means can be reduced, and an internal signal state of an LSI system can be monitored without increasing the number of LSI input/output pins, and thus system debug is easily performed.